src/cpu/sparc/vm/vm_version_sparc.cpp
Print this page
@@ -345,10 +345,16 @@
} else if (UseAdler32Intrinsics) {
warning("SPARC Adler32 intrinsics require VIS3 instruction support. Intrinsics will be disabled.");
FLAG_SET_DEFAULT(UseAdler32Intrinsics, false);
}
+ if (UseOnSpinWaitIntrinsic) {
+ if (!FLAG_IS_DEFAULT(UseOnSpinWaitIntrinsic))
+ warning("onSpinWait intrinsic is not available on this CPU");
+ FLAG_SET_DEFAULT(UseOnSpinWaitIntrinsic, false);
+ }
+
if (FLAG_IS_DEFAULT(ContendedPaddingWidth) &&
(cache_line_size > ContendedPaddingWidth))
ContendedPaddingWidth = cache_line_size;
// This machine does not allow unaligned memory accesses