156   if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) {
 157     AllocatePrefetchStyle = 1; // Fall back if inappropriate.
 158   }
 159 
 160   assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
 161 
 162   // Implementation does not use any of the vector instructions
 163   // available with Power8. Their exploitation is still pending.
 164   if (!UseCRC32Intrinsics) {
 165     if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
 166       FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
 167     }
 168   }
 169 
 170   if (UseCRC32CIntrinsics) {
 171     if (!FLAG_IS_DEFAULT(UseCRC32CIntrinsics))
 172       warning("CRC32C intrinsics are not available on this CPU");
 173     FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
 174   }
 175 






 176   // The AES intrinsic stubs require AES instruction support.
 177   if (UseAES) {
 178     warning("AES instructions are not available on this CPU");
 179     FLAG_SET_DEFAULT(UseAES, false);
 180   }
 181   if (UseAESIntrinsics) {
 182     if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
 183       warning("AES intrinsics are not available on this CPU");
 184     FLAG_SET_DEFAULT(UseAESIntrinsics, false);
 185   }
 186 
 187   if (UseGHASHIntrinsics) {
 188     warning("GHASH intrinsics are not available on this CPU");
 189     FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
 190   }
 191 
 192   if (UseSHA) {
 193     warning("SHA instructions are not available on this CPU");
 194     FLAG_SET_DEFAULT(UseSHA, false);
 195   }

 156   if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) {
 157     AllocatePrefetchStyle = 1; // Fall back if inappropriate.
 158   }
 159 
 160   assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
 161 
 162   // Implementation does not use any of the vector instructions
 163   // available with Power8. Their exploitation is still pending.
 164   if (!UseCRC32Intrinsics) {
 165     if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
 166       FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
 167     }
 168   }
 169 
 170   if (UseCRC32CIntrinsics) {
 171     if (!FLAG_IS_DEFAULT(UseCRC32CIntrinsics))
 172       warning("CRC32C intrinsics are not available on this CPU");
 173     FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
 174   }
 175 
 176   if (UseOnSpinWaitIntrinsic) {
 177     if (!FLAG_IS_DEFAULT(UseOnSpinWaitIntrinsic))
 178       warning("onSpinWait intrinsic is not available on this CPU");
 179     FLAG_SET_DEFAULT(UseOnSpinWaitIntrinsic, false);
 180   }
 181 
 182   // The AES intrinsic stubs require AES instruction support.
 183   if (UseAES) {
 184     warning("AES instructions are not available on this CPU");
 185     FLAG_SET_DEFAULT(UseAES, false);
 186   }
 187   if (UseAESIntrinsics) {
 188     if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
 189       warning("AES intrinsics are not available on this CPU");
 190     FLAG_SET_DEFAULT(UseAESIntrinsics, false);
 191   }
 192 
 193   if (UseGHASHIntrinsics) {
 194     warning("GHASH intrinsics are not available on this CPU");
 195     FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
 196   }
 197 
 198   if (UseSHA) {
 199     warning("SHA instructions are not available on this CPU");
 200     FLAG_SET_DEFAULT(UseSHA, false);
 201   }